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From 333f8a5556a48b5717196d047ec5377a331cc8e2 Mon Sep 17 00:00:00 2001
From: nuvole <mitltlatltl@gmail.com>
Date: Wed, 3 Jul 2024 11:02:07 +0800
Subject: [PATCH 10/16] drm/msm: dsi: add support for DSI-PHY on SC8280XP
Add DSI PHY support for the SC8280XP platform.
Signed-off-by: nuvole <mitltlatltl@gmail.com>
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 16 +++++++++-------
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 23 +++++++++++++++++++++++
3 files changed, 33 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index dd58bc0a4..09a8e35a4 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -577,19 +577,21 @@ static const struct of_device_id dsi_phy_dt_match[] = {
#ifdef CONFIG_DRM_MSM_DSI_7NM_PHY
{ .compatible = "qcom,dsi-phy-7nm",
.data = &dsi_phy_7nm_cfgs },
- { .compatible = "qcom,dsi-phy-7nm-8150",
+ { .compatible = "qcom,dsi-phy-7nm-8150", /* dpu 5.0 */
.data = &dsi_phy_7nm_8150_cfgs },
- { .compatible = "qcom,sc7280-dsi-phy-7nm",
+ { .compatible = "qcom,sc7280-dsi-phy-7nm", /* dpu 7.2 */
.data = &dsi_phy_7nm_7280_cfgs },
- { .compatible = "qcom,sm6375-dsi-phy-7nm",
+ { .compatible = "qcom,sm6375-dsi-phy-7nm", /* dpu 6.9 */
.data = &dsi_phy_7nm_6375_cfgs },
- { .compatible = "qcom,sm8350-dsi-phy-5nm",
+ { .compatible = "qcom,sm8350-dsi-phy-5nm", /* dpu 7.0, dsi 2.5.0 */
.data = &dsi_phy_5nm_8350_cfgs },
- { .compatible = "qcom,sm8450-dsi-phy-5nm",
+ { .compatible = "qcom,sc8280xp-dsi-phy-5nm", /* dpu 8.0, dsi 2.5.1 */
+ .data = &dsi_phy_5nm_8280_cfgs },
+ { .compatible = "qcom,sm8450-dsi-phy-5nm", /* dpu 8.1, dsi 2.6.0 */
.data = &dsi_phy_5nm_8450_cfgs },
- { .compatible = "qcom,sm8550-dsi-phy-4nm",
+ { .compatible = "qcom,sm8550-dsi-phy-4nm", /* dpu 9.0, dsi 2.7.0 */
.data = &dsi_phy_4nm_8550_cfgs },
- { .compatible = "qcom,sm8650-dsi-phy-4nm",
+ { .compatible = "qcom,sm8650-dsi-phy-4nm", /* dpu 10.0, dsi 2.8.0 */
.data = &dsi_phy_4nm_8650_cfgs },
#endif
{}
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index 4953459ed..0e3d48512 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -56,6 +56,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs;
+extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8280_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8450_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8550_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_4nm_8650_cfgs;
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
index 031446c87..636b12403 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
@@ -1246,6 +1246,29 @@ const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs = {
.quirks = DSI_PHY_7NM_QUIRK_V4_2,
};
+const struct msm_dsi_phy_cfg dsi_phy_5nm_8280_cfgs = {
+ .has_phy_lane = true,
+ .regulator_data = dsi_phy_7nm_37750uA_regulators, /* FIXME */
+ .num_regulators = ARRAY_SIZE(dsi_phy_7nm_37750uA_regulators),
+ .ops = {
+ .enable = dsi_7nm_phy_enable,
+ .disable = dsi_7nm_phy_disable,
+ .pll_init = dsi_pll_7nm_init,
+ .save_pll_state = dsi_7nm_pll_save_state,
+ .restore_pll_state = dsi_7nm_pll_restore_state,
+ .set_continuous_clock = dsi_7nm_set_continuous_clock,
+ },
+ .min_pll_rate = 600000000UL,
+#ifdef CONFIG_64BIT
+ .max_pll_rate = 5000000000UL,
+#else
+ .max_pll_rate = ULONG_MAX,
+#endif
+ .io_start = { 0xae94400, 0xae96400 },
+ .num_dsi_phy = 2,
+ .quirks = DSI_PHY_7NM_QUIRK_V4_2, /* FIXME */
+};
+
const struct msm_dsi_phy_cfg dsi_phy_5nm_8450_cfgs = {
.has_phy_lane = true,
.regulator_data = dsi_phy_7nm_97800uA_regulators,
--
2.47.1
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